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]D$ED$E$UKFD ]D$ED$E$UKFD]D$ED$E$UKFD]UEFD *D$ED$E$UKFʃ]D$0ED$E$UKFʃlUT$$wUEFDиmT$$wUEFD иmT$$xwUEFD ȋUEFD и2mL$T$$;wUEFD иJmT$$wUEFD иemT$$vUEFDиmT$$vUEFDиmT$$vUEFЃmT$$vUEFЃtCtmT$$IvEEEHEpED$ UT$D$E$ыEӉ%D$ED$E$NED$E$ED$E$EEpED$ UT$D$E$ыEEtED$ UT$D$E$ыMUETEExED$ UT$D$E$ыME‹ET UEEЍUEEЎUEEЏEE|ED$ UT$D$E$ыE%EED$ ED$ED$E$fEf}uEEED$ ED$ED$E$/EÃEEu돀}àqED$UT$D$ ED$ED$E$@EиmT$$sEиmT$$sEи nT$$~sEиnT$$fsE2n\$$RsEEn\$$>sEиXnT$$&sEPD$EĉD$T$ ED$ED$E$mnnUĉT$$r]Eĉ$rPD$EĉD$T$ ED$ED$E$|nUĉT$$r}ð ED$UT$D$ ED$ED$E$EиnT$$3rEиnT$$rEиnT$$rEиnT$$qEPD$EĉD$T$ ED$ED$E$2nUĉT$$q.ED$ ED$ED$E$EE$.EEuU( E$ҋ D$E$ҋE D$E$R E$҈E E$EUE$r E$ҋ D$E$ҋE D$E$ E$ҋE$U(E$ E$ҋ D$E$ҋE D$E$E( EMED$E$҃E}~ϋ E$ҋE$rU(E@XEE@uCE/ED$E$fEE :EtE}?~˸U$DoLdD$E$xD$D$$=bD$@D$ $cD$ D$D$E$~$docU8E@XE E$ҋEE} uE@ $YEE@ $<EE;E~$xoIcoUT$UT$$bE EoU T$$zbo$mb$aE6ED$E$E$E`$uaEE;E~$ m` E$ҸU E$UEdE `eE1D$D$$N``lT$$.t!o`T$$kaNp`T$$ au4^$_pD$`D$$aEԉD$$du$_`d$ud$ $-p6ad$eu$$~A!aQ1q I)iY9yE%eU5u M-m]=}C#cS3s K+k[;{G'gW7wO/o_?ERROR: no HOSTMOT2 firmware found. %X HOSTMOT2%d.%03dtoo many MHz!(unpresentable)IRQ logicWatchdogIOPortEncoderStepGenPWMGenSPISSIUART Transmit ChannelUART Receive ChannelTrnslationRAMMuxed EncoderMuxed Encoder SelectBuffered SPI InterfaceDBSPIDPLLMuxed Encoder MIMMuxed Encoder Select MIMThreePhasePWMWaveGenDAQ FIFOBIN OSCBIN DMDMABISSFABSHM2DPLLLIOPORTLEDResolverSmart Serial InterfaceTWIDDLER(unknown-gtag-%d)Firmware contains unknown function (gtag-%d)/ngOYcmwǚњۚ !(/6=gggggggggggggggggggggggggggggggggggggDgggggggggggggggggggggggggggggggggggggggggggggggggggggggggggggggKgggggggggggggggggggggggggggggggggggggggggggggggggggggggggggggggRY`Muxed AMuxed BMuxed IndexMuxed IndexMaskMux Select 0Mux Select 1ABIndexIndexMaskProbeNCREFPDM+REFPDM-AMUX0AMUX1AMUX2SPICSSPICLKSPIDO0SPIDO1Out0 (PWM or Up)Out1 (Dir or Down)Not-EnablePWM APWM BPWM CPWM /APWM /BPWM /CEnableFaultStepDirection(unused)TxData0TxData1TxData2TxData3TxData4TxData5TxData6TxData7TxEn0 TxEn1 TxEn2 TxEn3 TxEn4 TxEn5 TxEn6 TxEn7 RxData0RxData1RxData2RxData3RxData4RxData5RxData6RxData7/FrameSerial OutClockSerial InCS0CS1CS2CS3CS4CS5CS6CS7RX DataTX DataDrv Enableunknown-pin-%d^Ӝݜd'1;EOYcmwm͝ם s5?IS]gyɞӞݞyyyyyyyy#-OYcmw˟՟ߟ%IDRom: IDRom Type: 0x%02X Offset to Modules: 0x%08X Offset to Pin Description: 0x%08X Board Name: %.*s FPGA Size: %u FPGA Pins: %u Port Width: %u IO Ports: %u IO Width: %u Clock Low: %d Hz (%d KHz, %d MHz) Clock High: %d Hz (%d KHz, %d MHz) Instance Stride 0: 0x%08X Instance Stride 1: 0x%08X Register Stride 0: 0x%08X Register Stride 1: 0x%08X Module Descriptor %d at 0x%04X: General Function Tag: %d (%s) Version: %d Module Descriptor %d (at 0x%04x) has invalid ClockTag %d Clock Tag: %d (%s MHz) Instances: %d Base Address: 0x%04X -- Num Registers: %d Register Stride: 0x%08X Module Descriptor %d (at 0x%04x) has invalid RegisterStride %d -- Instance Stride: 0x%08X Module Descriptor %d (at 0x%04x) has invalid InstanceStride %d -- Multiple Registers: 0x%08X pin %d: Primary Tag: 0x%02X (%s) Secondary Tag: 0x%02X (%s) Secondary Unit: 0x%02X OutputInput Secondary Pin: 0x%02X (%s, %s) Configuration Name: %.*s General configuration information: BoardName : %.*s FPGA Size: %u KGates Number of IO Ports: %u Width of one I/O port: %u Clock Low frequency: %.4f MHz Clock High frequency: %.4f MHz IDROM Type: %u Modules in configuration: Module: %s There are %u of %s in configuration Version: %u Registers: %u BaseAddress: %04X ClockFrequency: %.3f MHz Configuration pin-out: IO Connections for %s Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir %2u %3u %-12s %-12s Global %2u %d%-13s%-12s (Out) (In) NullIRQLogicWatchDogQCountPWMUARTTXUARTRXAddrXMuxQCntMuxQSelBufSPIDBufSPIMuxQCntMMuxQSelMTPPWMDAQFIFOBinOscDMDMAResolverModSSerialTwiddlerNull1Null2Null3Null4Null5Null6Null7Null8Null9Null10Quad-AQuad-BQuad-IDXQuad-IDXMQuad-ProbeMuxQ-AMuxQ-BMuxQ-IDXMuxQ-IDXMQuad-ProbeMMuxSel0MuxSel1Step/Table1Dir/Table2Table3Table4Table5Table6SGindexSGProbeDir/EnablePWMAPWMBPWMCNPWMANPWMBNPWMC/ENAFAULTPDMAPDMBTrig0Trig1Trig2Trig3DataStrobeFullOscOutPwrEnPDMPPDMMADChan0ADChan1ADChan2SPIClkSPIDI0SPIDI1RXDataTXDataTXEnTestPinInBitIOBitOutBitDOutSClkDIn/CS-FRM0/CS-FRM1/CS-FRM2/CS-FRM3SyncDDSMSBFOutPostOutSyncToggleTXEna.A1Mb2Mb4Mb8Mb16Mbunknown4=FOXERROR: Board %s doesn't support flash writing. ERROR: Board %s doesn't support flash verification. ERROR: Board %s doesn't support FPGA resetting. ERROR: Board %s doesn't support FPGA programming. %02XrbCan't open file %s: %s ERROR: LBP16: Requested %d units to read, but protocol supports up to %d units to be read per packet ERROR: LBP16: Requested %d units to write, but protocol supports up to %d units to be write per packet 7I80DB-16J2J3J4J56slx16ftg2567I80DB-256slx25ftg2567I80HD-16P1P2P37I80HD-257I76E-16on-cardUnsupported ethernet device %s at %s %s.%dregistersmemoryEEPROMflashRORW8-bit16-bit32-bit64-bitHostmot2eth debugfixed 192.168.1.121fixed from EEPROMfrom BOOTPINVALID ETH device %s at ip=%s Board info: Flash size: %s (id: 0x%02X) Connectors count: %d Pins per connector: %d Connectors names: %s FPGA type: %s Number of leds: %d LBP16 firmware info: memory spaces: %d: %.*s (%s, %s, %s) [size=%u] [size=%uK] [size=%uM], page size: 0x%X, erase size: 0x%X [space 0] Hostmot2 [space 2] Ethernet eeprom: mac address: %02X:%02X:%02X:%02X:%02X:%02X ip address: %d.%d.%d.%d board name: %.*s user leds: %s [space 3] FPGA flash eeprom: flash id: 0x%02X %s [space 4] timers: uSTimeStampReg: 0x%04X WaituSReg: 0x%04X HM2Timeout: 0x%04X [space 6] LBP16 status/control: packets recived: all %d, UDP %d, bad %d packets sended: all %d, UDP %d, bad %d parse errors: %d, mem errors %d, write errors %d error flags: 0x%04X debug LED ptr: 0x%04X scratch: 0x%04X [space 7] LBP16 info: LBP16 version %d firmware version %d IP address jumpers at boot: %s @failed to clear EPP Timeout!EPP timeout on data cycle of read(addr=0x%04x, size=%d) EPP timeout on data cycle of write(addr=0x%04x, size=%d) Can't find file %s rbCan't open file %s: %s Programming FPGA... |EPP Timeout while sending firmware!/DONE is not low after CPLD reset!0xMESA7I907I90HDP1P2P3MESA7I437I43P4 EPP device %s at 0x%04X controlled by CPLD controlled by FPGABoard info: Flash size: %s (id: 0x%02X) Connectors count: %d Pins per connector: %d Connectors names: %s FPGA type: %s Number of leds: %d Can't find file %s rbCan't open file %s: %s Programming FPGA... |7I647I43P3P43s400tq1443s200tq144 USB device %s at %s controlled by CPLD controlled by FPGAUnknownPLX9030PLX9054PLX9056%s PCI bridge setup EEPROM: %02X: %04X Can't find file %s rbCan't open file %s: %s Programming FPGA... |FPGA asserted /INIT: CRC errorFPGA did not assert DONEBoard FPGA programmed successfullyFPGA did not reset: /INIT = %d, DONE = %d FPGA did not come out of /INITLAS%dBRD #READY is off, enabling now Error: Not /DONE; programming not completed./DONE status bit indicates busy at start of programming5I24xc6slx25ftg256%s need root privilges (or setuid root) /dev/mem%s can't open /dev/mem: %s6I25 (RECOVER)P3P26slx9pq1444I74P1P4xc6slx16ftg2565I256I255I202s200pq2084I654I683s400pq2085I215I22P53s1000fg3203s1500fg3205I234I696slx16ftg2566slx25ftg2563X20P6P9P73s1000fg4563s1500fg4563s2000fg4565I71 PCI device %s at %04X:%02X:%02X.%1X (%04X:%04X) Region %d: I/O at %04X [size=%04X] Region %d: Memory at %08X [size=%08X] Communication: Ctrl I/O addr: %04X Data I/O addr: %04X Memory: %08X Board info: Flash size: %s (id: 0x%02X) Connectors count: %d Pins per connector: %d Connectors names: %s FPGA type: %s Number of leds: %d pci_boards_initSSLBP port %d: interface type: %0x interface width: %d SSLBP Version: %d.%d SSLBP Channel Start: %d SSLBP Channel Stride: %d SSLBP Processor Type: %x SSLBP Channels: %d SSLBP Baud Rate: %d SSLBP Clock: %u MHz RecordType: %02X DataSize: %02X DataType: %02X DataDir: %02X param min: %f param max: %f param addr: %04X unit: %s name: %s record type: %02X mode index: %02X mode type: %02X unused: %02X mode name: %s device at channel %d: %.*s (unit 0x%08X) %x timeout waiting for SPI data Erasing sector 0 for boot blockBootBlock installedFile Size too large to fitEEPROM sectors to write: %d, max sectors in area: %d Erasing EEPROM sectors starting from 0x%X... |Can't find file %s rbCan't open file %s: %s Boot sector OKFailed to write valid boot sectorProgramming EEPROM area starting from 0x%X... Board configuration updated successfullyError: BootSector is invalidVerifying EEPROM sectors starting from 0x%X... Error at 0x%X expected: 0x%X but read: 0x%X Board configuration verified successfullyERROR: %s(): %s Erasing sector 0 for boot blockBootBlock installedFile Size too large to fitEEPROM sectors to write: %d, max sectors in area: %d Erasing EEPROM sectors starting from 0x%X... |Can't find file %s rbCan't open file %s: %s Boot sector OKFailed to write valid boot sectorProgramming EEPROM sectors starting from 0x%X... Board configuration updated successfullyError: BootSector is invalidVerifying EEPROM sectors starting from 0x%X... Error at 0x%X expected: 0x%X but read: 0x%X Board configuration verified successfullyerase_sectordeviceaddrwriteverifyfallbackrecoverprogramreadhmidsseriallistrpowpolbp16infohelpverbose Mesaflash version 3.0.0 (built on %s %s with libpci %s) 3.0.002:50:12Apr 17 2014Configuration and diagnostic tool for Mesa Electronics PCI(E)/ETH/EPP/USB boards(C) 2013-2014 Michael Geszkiewicz (contact: micges@wp.pl)(C) Mesa ElectronicsTry 'mesaflash --help' for more informationSyntax: mesaflash [options] mesaflash [options] --write filename mesaflash [options] --verify filename mesaflash [options] --program filename mesaflash [options] --readhmid mesaflash [options] --sserial mesaflash [options] --rpo address mesaflash [options] --wpo address=value mesaflash [options] --lbp16 mesaflash --list mesaflash --info file_name mesaflash --help Options: --device select active device name. If no command is given it will detect board with given name and print info about it. --addr select for looking for (network C mask for ETH boards, serial port for USB boards) --fallback use the fallback area of the EEPROM --recover access board using PCI bridge GPIO (currently only 6I25) --verbose print detailed information while running commands Commands: --write writes a standard bitfile 'filename' configuration to the userarea of the EEPROM (IMPORTANT! 'filename' must be VALID FPGA configuration file) --verify verifies the EEPROM configuration against the bitfile 'filename' --program writes a standard bitfile 'filename' configuration to the FPGA (IMPORTANT! 'filename' must be VALID FPGA configuration file) --readhmid print hostmot2 configuration in PIN file format --sserial print full information about all sserial remote boards --rpo read hostmot2 variable directly at 'address' --wpo write hostmot2 variable directly at 'address' with 'value' --lbp16 run directly by lbp16 interface module available commands: send_packet=hex_data send packet created from and print returned data --list show list of all detected boards --info print info about configuration in 'file_name' --help print this help messageoption %s with arg %sError: multiply --device optionError: multiply --addr optionError: multiply --write optionError: multiply --program optionError: multiply --rpo option0xError: multiply --wpo option=Error: multiply --lbp16 optionsend_packetError: unknown lbp16 commandError: multiply --verify optionError: multiply --info options@EEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE[AEE@EEEEOEEE-DEEBAE8BEEEEANo %s board found %08X 2 X Jo ,L N xooozΌތ.>N^n~΍ލ.>N^n~Ύގ.>N^n~Ώޏv[{[[L[L[M M[ [ [ [ [ [[M[[[M[[[MN[\ \\\!\'\-\3\9\?\E\K\\\!\'\-\3\9\?\E\K\\\!\'\-\3\9\?\E\K\\\!\'\-\3\9\?\E\K\R\Y\`\i\s\3\9\?\E\K\ ~\\\\\3\9\?\E\K\ \\!\'\-\3\9\?\E\K\~\\\\\3\9\?\E\K\\\!\'\-\3\9\?\E\K\\\\\\\\\E\K\[\]'\-\3\9\?\E\K\ ]]]]]%]+]0]E\K\6];]@]F]L]R]9\?\E\K\X]]]d]'\-\3\9\?\E\K\i]\!\'\-\3\9\?\E\K\\\!\'\-\3\9\?\E\K\p]v]{]]]]R]]]]]]]-\3\9\?\E\K\]]]'\-\3\9\?\E\K\[S]]]-\3\9\?\E\K\[S]]]}SSSSE\K\\]]]]]]^E\K\ ^^^^&^3\9\?\E\K\]]!\'\-\3\9\?\E\K\ ]1^!\'\-\3\9\?\E\K\ ]\!\'\-\3\9\?\E\K\ \\!\'\-\3\9\?\E\K\\\!\'\-\3\9\?\E\K\Uf12a2 22 03!20 011@@@AxKV0CBC'4CLV0CBC(4CLV0CBC)4CLsdsaswsvssspss s$srsoslsithtHGCC: (Ubuntu 4.4.3-4ubuntu5.1) 4.4.33R* |ȯh0\1$I1`0sY(@pS 3% m=<>> sleep_ns^!lbp_sendilbp_recvlbp_read_ctrllbp_readlbp_writelbp_print_info lbp_init8lbp_releaseLsd@Rprint_bitfile_headerbitfile_reverse_bits* R Thm2_read_idromhm2_hz_to_mhz hm2_get_general_function_namehm2_find_modulehm2_print_idrom0hm2_print_moduleshm2_print_pinshm2_print_pin_file|Q eeprom_get_flash_type) eeprom_prepare_boot_blockQ eeprom_calc_user_space} eeprom_init eeprom_cleanup boot_block page_buffer> file_bufferD>anyio_init~anyio_cleanupanyio_scananyio_get_devanyio_list_dev`anyio_dev_write_flashanyio_dev_verify_flash anyio_dev_program_fpgaZanyio_dev_send_packetanyio_dev_print_hm2_infoEanyio_dev_print_sserial_infomanyio_bitfile_print_infoboardsboards_count1GMeth_socket_send_packeteth_socket_recv_packeteth_socket_set_dest_ipQlbp16_readlbp16_writeueth_boards_initeth_boards_cleanupeth_boards_scaneeth_print_infosdlen"dst_addr4src_addrIepp_readepp_writeepp_program_fpga(epp_resettepp_boards_initepp_boards_cleanup,epp_boards_scanepp_print_info`Uusb_read&usb_writeusb_boards_initusb_boards_cleanupusb_boards_scanusb_boards_releaseusb_print_infos_pci_plx9030_bridge_eeprom_setup_readpci_readepci_write)pci_boards_initpci_boards_cleanuppci_boards_scan:pci_print_infopaccsetup_eeprom_5i20(setup_eeprom_3x20_10:setup_eeprom_3x20_15Lsetup_eeprom_3x20_20_@ sslbp_send_local_cmdsslbp_read_local_cmd*sslbp_read_datarsslbp_wait_completesslbp_send_remote_cmdsslbp_read_local8Psslbp_read_local32sslbp_read_remote8 sslbp_read_remote16 sslbp_read_remote32 sslbp_read_remote_bytes enable_sserial_pins# disable_sserial_pins sserial_module_initread_flash_id7local_write_flashlocal_verify_flashopen_spi_access_localclose_spi_access_localaccesstremote_write_flashremote_verify_flash1open_spi_access_remote[close_spi_access_remotewm spi_boards_init spi_boards_cleanup! spi_boards_scanI spi_boards_releaseq spi_print_infoGbspilbp_print_infovspilbp_initspilbp_releaseR5 print_short_usage& print_usage: process_cmd_line maini/\W1intRud8=y~zn#{d#u64#] U FUX tvWh W`Zi/\W1intRv8%A,3u8}u16u32 0D Ep# FO# AGO# HO# IO# pciJO# eppKO# usbLO# ethMO# spiNO#$ Op#( KP#, lQ#.R F cmdG# H# TI#+K }M cmdN# O# TP# Q#S 8(OA,i (n(O<*Ol c4OAjX 4n4Og6Ol @jcmd@\ Ao<BOhgBOd "KOy7K\Kn<LOhgLOd MmptrNy` Y[Oa7[\[n<\Olg\Oh ]aja  koqΒ42Iq2Β`sd#OiF/\W1intR#8Vzd8b3%u81 - O# # # # u# C# # # # ]#$ P#(  #, "#0 $#4 &O#8 y*O#< ,,o#@ 0,#D 1A#F 2#G s6#H 0?#L $H#T +I#X 2J#\ 9K#` @L#d NO#h GP#l  8  # Q# nO#  'Oʗfp}} }W O}!O}!O}ret"O} `fʗ ftkgKN iǯ\/W1intRv8vk v , A3 %vkvkvk u8 u16 u32 @\ ]# ^# _# B`# a# qb# c# 9d# e#$ f#( g#, h#0 i#4 j#8 k#< l  qh r# s# t# u# v# w# (x# {y# 0z  # # # # sf#<#%## ### # # O#    # }#  r 6% % [ 0M# F 1M# 2m# 63m# D4# 5# [6O# @7O# [8# 79O#@ }:#D B;#H S# ?# @O#  ' (# )# z*# +#L ,#hk#k _-OMnO.OmpSOpsOkvkfkk ,C tagD# E #pk F HI Ip#tagJ# #K$qMlhiOd2. 2/3ır4Ol5Oh5Od=B.<PBOg.dP`v`kclhpinl.mPnOlhm2 d!iOth#") 0hm2 "hm2!iOl#!mod"h$7#d$$`"Jhm2J!iKOl#!pinNh"j[ǯD [!i\%!j\%$]  ${,  $L [%{ !kOu!pin$XO%֫ !kO%^ !kOC!kO#0$ !ptrp, kI< kL k < M i ȯ0a/\W1intRv8%A,3v kv k u8} u16 u32 u64#] + EX+4 -3# .O# /O# s1p# 2O# 3O# 53# P8O# ;A# # ?# @O#  ' (# )# z*# +#L ,-#- k= k_-OgnOHOpmOpO kv k k k%  (   E 0  w   %  P  " 2d" %% # &E # 'w # (# Q)# Z*O# +# dev-s#( .n#, len/O#0 M 0#4 z4#8 E 5#: 7#< 8#> 4 9n#@ d :n#D ;O#H = #L > #P ? #T A#XO        ,pȯp) ,tz 8aQ 8t6 Ba} Btn M MN lk^0  ^_ l k?    k )  > !k *- iD 03b0\int/W1R#8E>v8LAS0    u8 u16 u32 u64#o +% EX+{ -0# .7# /7# s1# 27# 37# 50# P87# ;# <#$ =#( ?#, , B#0 eC#4 D+#8 n E=#< BF7#@ T G7#DfdH7#H ?I7#L c J#P lK7#T{ ? r# ! s#bust#devt# t# V w7# x# x# y#irqz7# J {C# |C#L }0#|  ~0# IS# , # Y# 7# 7#aux#(  ; C a# ? b# c# d7# e# 1%v 70S ;@\: ]# ^# _# B`# a# qb# c# 9d# e#$ f#( g#, h#0 i#4 j#8 k#<l_ q r# s# t# u# v# w# (x# {y#0zE  # # # ##<#%## ### # # 7#   # # 6% % [ 0# F 1# 2# 63# D4# 5# [67# @77# [8# 797#@ }:#D B; #H S<#Xhm2=y#\ > # ?* # @7#  'S (S# )# z*:# +Y#L ,i#i  y _-7S77S7S7S  * :  a  (   :    l    %    " 2d "  %a # & #  ' #  (# Q )# Z *7#  + #dev -#(  .#,len /7#0 M 0#4 z 4#8 E 5#: 7#<  8#> 4 9#@ d :#D  ;7#H  =! #L  >! #P  ?3 #T  A#X7    3  ' 0 D  E# F7# A G7# H7# I7#pci J7#epp K7#usb L7#eth M7# spi N7#$  O#( K P#, l Q#. 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Rg  pr c q# r#  s# T t#= u1   #  #  # 7 # # k } 0   # P # C #  #  #  #  # ( # # #  #" 2 #$ < #&  #( F #* P #, Y #. k  , #  # i #_   #  # L # #  #  #  #  # & # z # # # 5 # 7 B # # $ # #,  Oȷ\ nOdOȷnOG valOl!G"valOl#  9$L p% p8&U Od'cmd$7$n$O ( r X(<OT(gOP( H)k&@ 'Or'cmd'\$7'$'n$'O *(})r #\*#( +T(<,Ol+k,8Or $8 $78$8n$8O ,AOld$A $7A$An$AO ,: JOl$JI ,VO@$VI ,pZOplo$IZo( [r T([r P(<\OL(g\OH"ret\OD(]@-Z( eX(fI & &Op$Io# )$Io"iOl- (I h#0 #)6e$I#o(7$8 \"i%O"ptr&p-(L =#t G6 $GI }( Hr "iIO~"jIO~(J~({K}(L~(M~( N~( O~(` P L(ZQ(c R,~( S~(TB( U}-6((~p kp kp kr  k  k. 4. 5O/sd8O/len9C 0V > 0:>  i0 /\W1intR#8V9]'o33e:393du]Z8b3%A,3=ya ~z# {# q      u8 u16" u32- u64#] +EX+ -3# .O# /O# s1# 2O# 3O# 53# P8O# ;# <#$ =#( ?F#, , BR#0 eC#4 D#8 n E#< BFO#@ T GO#D fdHO#H ?IO#L c JF#P lKO#T?F rF# ! s# bust# devt# t# V wO# x# x# y# irqzO# J {# |#L }#|  ~# I# , R# # O# O# aux#( L; C a# ? b# c# dO# e#X v    1 - O# # #  # u #C # # #  # ] #$P #( #, "#0 $#4 &O#8y *O#<, ,#@ 0,#D 1A#F 2#Gs 6#H0 ?#L$ H#T+ I#X2 J#\9 K#`@ L #d NO#hG P#l 8   # Q # n O#   & ',X ,, -z# $ /,# 2 2#  7#  8# i =#  ># p Bz# + D,#(  G#,  K#0  M#4  X8#8  Y8#@  Z8#H < j:#P F k:#T@ \  ]#  ^#  _# B `#  a# q b#  c# 9 d#  e#$  f#(  g#,  h#0  i#4  j#8  k#< l, q  r# s#  t#  u#  v#  w# ( x# { y#0 z    #  #  #  #    #< #% # #  # # # # # O#      # a# 6 %   % [ 0p # F 1p #  2 # 6 3 # D 4 #  5 # [ 6O# @ 7O# [ 8 # 7 9O#@ } :&#D B ; #H S <#X hm2 =F #\  > #  ? # @O#   '  ( #  )# z * #  +& #L  ,6 # 6  F _ - Op  OQ O  v O   O   &      .  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crtstuff.c__CTOR_LIST____DTOR_LIST____JCR_LIST____do_global_dtors_auxcompleted.7021dtor_idx.7023frame_dummy__CTOR_END____FRAME_END____JCR_END____do_global_ctors_auxcommon.clbp.cbitfile.cswaptab.2309hostmot2.cmhz_str.2392unknown.2440hm2_get_pin_secondary_nameunknown.2447mod_names.2760pin_names.2759eeprom.canyio.ceth_boards.ceth_socket_nonblockingeth_socket_blockingeth_socket_get_src_ippacket.5195eth_readeth_writeeth_board_openeth_board_closeeth_scan_one_addrepp_boards.cinbinloutboutlpage_bufferfile_bufferparport_getparport_releaseepp_read_statusepp_write_statusepp_write_controlepp_check_for_timeoutepp_clear_timeoutepp_addr8epp_addr16epp_read8epp_read32epp_write8epp_write32epp_board_openepp_board_closeusb_boards.cusb_program_fpgausb_board_openusb_board_closepci_boards.cinwoutwmemfdplx9030_SetCSHighplx9030_SetCSLowplx9030_SetDinHighplx9030_SetDinLowplx9030_SetClockHighplx9030_SetClockLowplx9030_DataHighQplx9030_read_eeprom_wordplx9056_read_eeprom_dwordplx9056_read_eeprom_wordplx9030_program_fpgaplx9030_resetplx9030_fixup_LASxBRD_READYplx905x_program_fpgaplx905x_resetpci_fix_bar_lengthspci_board_openpci_board_close__func__.4207sserial_module.ceeprom_local.cwait_for_data_hm2set_cs_high_hm2set_cs_low_hm2prefix_hm2suffix_hm2send_byte_hm2recv_byte_hm2GPIO_reg_valset_cs_high_gpioset_cs_low_gpioset_din_high_gpioset_din_low_gpioset_clock_high_gpioset_clock_low_gpioget_bit_gpioprefix_gpiosuffix_gpioinit_gpiorestore_gpiosend_byte_gpiorecv_byte_gpiowait_for_data_ioset_cs_high_ioset_cs_low_ioprefix_iosuffix_iosend_byte_iorecv_byte_iosend_addresswrite_enableread_statuswait_for_writeread_byteerase_sectorwrite_pagecheck_bootwrite_bootstart_programmingdone_programmingeeprom_remote.cread_page__func__.2738write_flash_addressspi_boards.cspilbp.cmain.cdevice_flagaddr_flagwrite_flagverify_flagfallback_flagrecover_flagprogram_flagreadhmid_flagsserial_flaglist_flagrpo_flagwpo_flagrpo_addrwpo_addrwpo_datalbp16_flaglbp16_send_packet_flaglbp16_send_packet_datainfo_flagverbose_flagbitfile_nameaccesslong_options_GLOBAL_OFFSET_TABLE___init_array_end__init_array_start_DYNAMICdata_startabort@@GLIBC_2.0__errno_location@@GLIBC_2.0close_spi_access_locallbp_print_infosprintf@@GLIBC_2.0open@@GLIBC_2.0mmap@@GLIBC_2.0open_spi_access_remotestrerror@@GLIBC_2.0lensslbp_send_remote_cmd__libc_csu_finiinet_ntoa@@GLIBC_2.0epp_boards_scanremote_write_flash_starthm2_print_pinssetup_eeprom_3x20_15epp_boards_init__xstat@@GLIBC_2.0pci_write_word@@LIBPCI_3.0epp_write__gmon_start___Jv_RegisterClassespci_plx9030_bridge_eeprom_setup_readsslbp_read_remote16_fp_hweth_socket_set_dest_ipspi_boards_initlocal_write_flashsslbp_read_datapacc_finisslbp_read_remote32boards_countinet_addr@@GLIBC_2.0spi_boards_releasestrncpy@@GLIBC_2.0putchar@@GLIBC_2.0write@@GLIBC_2.0sendto@@GLIBC_2.0hm2_read_idrompow@@GLIBC_2.0toupper@@GLIBC_2.0remote_verify_flashspi_boards_cleanupmemset@@GLIBC_2.0pci_read_long@@LIBPCI_3.0pci_alloc@@LIBPCI_3.0hm2_hz_to_mhz__libc_start_main@@GLIBC_2.0sleep_nslbp_readpci_writestrrchr@@GLIBC_2.0usb_print_infoeeprom_get_flash_typehtons@@GLIBC_2.0__statepp_print_infoepp_readstatlbp_sendread@@GLIBC_2.0hm2_print_modulesperror@@GLIBC_2.0anyio_initeth_boards_scanusb_boards_releasesetup_eeprom_5i20process_cmd_line_IO_stdin_usedanyio_dev_print_sserial_infostrtol@@GLIBC_2.0spilbp_print_infoinet_pton@@GLIBC_2.0setup_eeprom_3x20_10__data_startsrc_addranyio_dev_write_flashfflush@@GLIBC_2.0getopt_long@@GLIBC_2.0eeprom_prepare_boot_blocksocket@@GLIBC_2.0usb_writeepp_resetepp_boards_cleanuphm2_get_general_function_namefclose@@GLIBC_2.1sdboardsnanosleep@@GLIBC_2.0memcpy@@GLIBC_2.0boot_blocksserial_module_initstrlen@@GLIBC_2.0pci_readfopen@@GLIBC_2.1lbp16_readbitfile_reverse_bitsclose_spi_access_remote__dso_handlepci_cleanup@@LIBPCI_3.0usb_readprint_usagesslbp_read_remote8feof@@GLIBC_2.0strcpy@@GLIBC_2.0sslbp_read_remote_bytes__DTOR_END__lbp16_write__libc_csu_initsetup_eeprom_3x20_20printf@@GLIBC_2.0lbp_releaseeth_socket_send_packetanyio_dev_verify_flashgetuid@@GLIBC_2.0anyio_list_devdisable_sserial_pinsusb_boards_initspilbp_releaseiopl@@GLIBC_2.0lbp_writeeeprom_inithm2_print_pin_filesslbp_read_local32hm2_find_moduleenable_sserial_pinsclose@@GLIBC_2.0hm2_print_idromanyio_dev_print_hm2_info__bss_startanyio_dev_send_packetsslbp_send_local_cmd__stack_chk_fail@@GLIBC_2.4anyio_scanlbp_recvdst_addranyio_get_devstrtok@@GLIBC_2.0spilbp_initopen_spi_access_localpci_scan_bus@@LIBPCI_3.0pci_read_word@@LIBPCI_3.0spi_boards_scansslbp_read_local8pci_init@@LIBPCI_3.0usb_boards_cleanupepp_program_fpga_endstdout@@GLIBC_2.0eeprom_cleanupputs@@GLIBC_2.0anyio_cleanupprint_short_usageanyio_bitfile_print_infopci_boards_initfcntl@@GLIBC_2.0sslbp_read_local_cmdeth_boards_cleanuplbp_read_ctrlusb_boards_scanstrncmp@@GLIBC_2.0munmap@@GLIBC_2.0optarg@@GLIBC_2.0fread@@GLIBC_2.0seteuid@@GLIBC_2.0anyio_dev_program_fpgalocal_verify_flash_edatasnprintf@@GLIBC_2.0eth_socket_recv_packeteth_boards_initspi_print_infosslbp_wait_completepci_boards_scanrecvfrom@@GLIBC_2.0print_bitfile_headerread_flash_idlbp_initexit@@GLIBC_2.0eeprom_calc_user_spacepci_boards_cleanupeth_print_info__i686.get_pc_thunk.bxpci_fill_info@@LIBPCI_3.0pci_print_infomain_init